The present invention relates to a method for fabricating a capacitor of a semiconductor device, and more particularly, to a capacitor including a metal layer such as a ruthenium (Ru) layer that is used for a lower or an upper electrode, and a method for fabricating the capacitor.
In general, a capacitor used in a memory cell may include a lower electrode for storage, a dielectric layer, and an upper electrode for a plate. The capacitance of the capacitor can be increased by, for example, reducing a thickness of the dielectric layer, forming the capacitor into a three-dimensional shape to increase the effective area of the capacitor, or using a high-permittivity dielectric material such as tantalum pentoxide (Ta2O5) for the dielectric layer without increasing a size of the capacitor.
When the lower electrode is formed of polysilicon, it is difficult to use Ta2O5 for forming the dielectric layer since the lower electrode formed of polysilicon oxidizes when a high-temperature heat treatment is performed on the dielectric layer formed of Ta2O5. In this case, the effective thickness of the dielectric layer increases, and the capacitance of the capacitor decreases. Furthermore, the electric characteristics of the capacitor deteriorate due to variations in the current output of the capacitor caused by asymmetric current-voltage characteristics of the capacitor.
Therefore, in the field of under 0.1 μm technology, the lower electrode is formed of a metal such as ruthenium instead of polysilicon. For example, a metal-insulator-metal (MIM) capacitor or a metal-insulator-polysilicon (MIP) capacitor has been introduced. The MIM capacitor can be fabricated by sequentially stacking a lower electrode metal layer, a dielectric layer, and an upper electrode metal layer on a substrate after the substrate is processed. The lower electrode metal layer and the upper electrode metal layer can be formed of ruthenium layers having a low resistivity. The ruthenium layers are generally formed by atomic layer deposition (ALD) due to a large height difference in a structure of the MIM capacitor.
However, a ruthenium layer deposited on a substrate by ALD is not firmly bonded to the substrate since the ruthenium layer exhibits poor adhesiveness although the adhesiveness of the ruthenium layer can be improved depending on the kind of the substrate. Therefore, contact defects such as a blister can be formed between the ruthenium layer and the substrate.
FIG. 1 illustrates a ruthenium layer 13 of a conventional MIM capacitor. Referring to FIG. 1, when the ruthenium layer 13 is formed on a structure in which a TiN layer 11 and a TiO2 layer 12 are sequentially formed, the ruthenium layer 13 can be removed from the structure. In this case, a blister 14 may be formed between the ruthenium layer 13 and the structure, making it difficult to fabricate the capacitor and deteriorating the characteristics of the capacitor, such as a capacitance and a leakage current.
Therefore, when a capacitor is fabricated using a ruthenium layer having a low resistivity as a lower or an upper electrode, it is necessary to firmly bond the ruthenium layer to a substrate or other layers.